This course offers introductory training on the AMD Vivado™ Design Suite and demonstrates the FPGA design flow for those uninitiated to FPGA design.The course provides experience with:Creating a Vivado Design Suite pr...
Learn how to build a more effective FPGA design:The focus is on:Using synchronous design techniquesUtilizing the Vivado™ IP integrator to create a sub-systemPerforming power analysis and optimization to improve the po...
Learn how to effectively employ timing closure techniques. This course includes: Demonstrating timing closure techniques such as baselining, pipelining, and synchronization circuits Showing optimum HDL cod...
Learn how to effectively employ timing closure techniques.This course includes:Demonstrating timing closure techniques such as baselining, pipelining, and synchronization circuitsShowing optimum HDL coding techniques ...
Learn how to use the advanced aspects of the Vivado™ Design Suite.The focus is on:Applying techniques to reduce delay and to improve clock skew and clock uncertaintyUtilizing floorplanning techniquesEmploying advanced...
Explore the Vivado™ IP integrator tool and its features to gain the expertise needed to develop, implement, and debug different IP integrator block designs using the Vivado Design Suite.This course focuses on:Creating...
Learn about the key features and architecture of the AMD Spartan™ UltraScale+™ FPGA, including its advanced I/O, high-speed transceivers, substantial built-in and external memory, PCIe® Gen4 connectivity, and modern s...
This course introduces the UltraScale™ and UltraScale+™ architectures to both new and experienced designers.The emphasis is on:Introducing CLB resources, clock management resources (MMCM and PLL), global and regional ...
Learn about the AMD Versal™ adaptive SoC architecture building blocks, such as the programmable logic, high-speed I/O, clocking, processing system, AI Engines, and the programmable network on chip (NoC). Also learn ho...
Use different AMD Versal™ adaptive SoC design methodologies and techniques for developing designs targeting Versal devices. Also learn how to apply application mapping and partitioning, design closure, power, and ther...
