Designing with the Versal Adaptive SoC: Architecture
Course Details
Length:
21 Hours
Number of Labs:
8
Number of Chapter:
19
Current Version:
2025.1
Number of Demos:
0
Overview
Learn about the AMD Versal™ adaptive SoC architecture building blocks, such as the programmable logic, high-speed I/O, clocking, processing system, AI Engines, and the programmable network on chip (NoC). Also learn how to use leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application.
The emphasis of this course is on:
Reviewing the architecture of the Versal adaptive SoC
Describing the different compute resources available in the Versal architecture
Describing the architectures of the network on chip (NoC) and AI Engine
Outlining the memory solutions and programming interfaces available in the Versal adaptive SoC
Identifying the PCI Express® and serial transceiver solutions available in the Versal adaptive SoC
What's New:
Introduction and Portfolio Overview module: Added Versal AI Edge Series Gen 2 and Prime Series Gen 2 details
Architecture Overview module: Introduced new PS and AI Engine resources available in Versal AI Edge Series Gen 2 and Prime Series Gen 2
SelectIO Resources module: Introduced the high-performance X5IO I/O type
Clocking Architecture module: Added information on Versal clock deskew options
Processing System module: Added Versal AI Edge Series Gen 2 and Prime Series Gen 2 processing system information
AI Engine module: Introduced the AIE-ML v2 architecture
Memory Solutions module: Added DDR5/LPDDR5 memory controller information
PCI Express module: Added information on the MDB5 PCIE architecture
All labs have been updated to the latest software versions
