Learn how to develop, debug, and profile new or existing C/C++ and RTL applications in the Vitis™ unified software environment targeting both data center and embedded applications.The emphasis of this course is on: Bu...
This course provides system architects with an overview of the capabilities and support for the AMD Zynq™ UltraScale+™ MPSoC and Versal™ adaptive SoC devices.The emphasis is on:Utilizing power management strategies ef...
Use different AMD Versal™ adaptive SoC design methodologies and techniques for developing designs targeting Versal devices. Also learn how to apply application mapping and partitioning, design closure, power, and ther...
This course provides an overview of the hard block capabilities for the AMD Zynq™ UltraScale+™ RFSoC family with a special emphasis on the RF Data Converter and Soft-Decision FEC blocks.The focus is on:Describing the ...
This course describes the AMD Versal™ AI Engine architecture, the data communications within an AI Engine array and between the PL and AI Engines, how to program the AI Engines (single kernel programming and multiple ...
This course describes the system design flow and interfaces that can be used for data movement in the AMD Versal™ AI Engine. It demonstrates how to utilize AI Engine APIs and the AI Engine DSP library for faster devel...
This course covers the AMD Versal™ AI Engine architecture and memory modules, programming the AI Engine (kernels and graphs), using the DSP Library, developing AI Engine designs using AMD Vitis™ Model Composer, and de...
Learn how to build and run complex multimedia applications targeting AMD Zynq™ UltraScale+™ MPSoC EV, Versal™ AI Core, or Versal AI Edge devices with the help of the open-source GStreamer framework.The course also ill...
This course provides embedded systemsdevelopers experience with creating an embedded Linux® system targeting AMD SoCs using the PetaLinux tools.The course provides experience with: Using open-source embedded Linux com...
This course covers the AMD Versal™ architecture and illustrates the tool flow for developing HLS and AI Engine components as well as integrating an entire system project when designing an embedded heterogeneous system...