Designing with Versal AI Edge Series Gen 2: AIE-ML v2 Architecture and Design Flow
Course Details
Length:
13 Hours
Number of Labs:
4
Number of Chapter:
9
Current Version:
2025.1
Number of Demos:
0
Overview
This course outlines the architecture of AMD Versal™ AI Engine ML v2 (AIE-ML v2), a part of AMD Versal AI Edge Series Gen 2 devices, and explores the features and key architectural enhancements with this iteration of AI Engines.
This course provides an overview of both native and supported data types and highlights how to program the AI Engine and migrate older AI Engine designs. The enhancements included in AIE-ML v2, utilizing the DSP libraries, along with the compute capabilities and how to analyze performance, will also be demonstrated.
The emphasis of this course is on:
Providing an overview of the new AI Engine (AIE-ML v2) architecture
Describing the system design planning and application partitioning methodology
Describing the AMD Vitis™ and AI Engine tool flow
Providing an overview of the native and supported data types for functional implementation in AIE-ML v2
Illustrating the programming model and the usage of shared buffers (memory tiles) for the AIE-ML v2
Utilizing the Vitis DSP library for AI Engines in implementing a matrix multiplication with multiple tiles
Analyzing reports using the Vitis Analysis view and reviewing throughput and performance
