Designing with Versal AI Engine: Graph Programming with AI Engine Kernels - 2
Course Details
Length:
23 Hours
Number of Labs:
7
Number of Chapter:
13
Current Version:
2024.2
Number of Demos:
0
Overview
This course describes the system design flow and interfaces that can be used for data movement in the AMD Versal™ AI Engine. It demonstrates how to utilize AI Engine APIs and the AI Engine DSP library for faster development.
In addition, advanced features in adaptive data flow (ADF) graph implementation, such as using streams, cascade streams, buffer location constraints, runtime parameterization, and APIs to update and read runtime parameters, are covered. The course also highlights how to utilize the Vitis™ Model Composer tool for AI Engine designs.
The emphasis of this course is on:
Implementing a system-level design flow (PS + PL + AIE) and the supported simulation
Using an interface for data movement between the PL and AI Engine
Utilizing AI Engine APIs for arithmetic operations and advanced functions to implement filters
Utilizing the AI Engine DSP library for faster development
Applying runtime parameters for an AI Engine design
Utilizing the Vitis Model Composer tool for AI Engine designs
What,s New:
Adaptive SoC - Data Communications modules: Restructured with additional information on interface bandwidth and performance
Introduction to the AI Engine DSP Library module: Added information on matrix multiply and matrix vector multiply functions
All labs have been updated to the latest software versions
