Learn about the AMD Versal™ adaptive SoC architecture building blocks, such as the programmable logic, high-speed I/O, clocking, processing system, AI Engines, and the programmable network on chip (NoC). Also learn ho...
Explore the AMD Versal™ adaptive SoC heterogeneous architecture containing a programmable network on chip (NoC) and AI Engines and learn how to use different design tool flows targeting Versal devices. Gain knowledge ...
This course provides a thorough introduction to the Verilog language.The emphasis is on:Writing efficient hardware designsPerforming high-level HDL simulationsEmploying structural, register transfer level (RTL), and b...
This course describes the AMD Versal™ AI Engine architecture, the data communications within an AI Engine array and between the PL and AI Engines, how to program the AI Engines (single kernel programming and multiple ...
This course covers the AMD Versal™ AI Engine architecture and using the AI Engine DSP Library, system partitioning, rapid prototyping, and custom coding of AI Engine kernels. Developing AI Engine DSP designs using AMD...
This course describes the system design flow and interfaces that can be used for data movement in the AMD Versal™ AI Engine. It demonstrates how to utilize AI Engine APIs and the AI Engine DSP library for faster devel...
This course covers the advanced features of the AMD Versal™ adaptive SoC AI Engine, including kernel function development, optimizing an AI Engine kernel program, using AI Engine APIs and filter intrinsics, and debugg...
This course covers the AMD Versal™ AI Engine architecture and memory modules, programming the AI Engine (kernels and graphs), using the DSP Library, developing AI Engine designs using AMD Vitis™ Model Composer, and de...
This course covers the AMD Versal™ architecture and illustrates the tool flow for developing HLS and AI Engine components as well as integrating an entire system project when designing an embedded heterogeneous system...
This course illustrates the different approaches for efficiently migrating existing designs to the AMD Versal™ adaptive SoC from AMD UltraScale+™ devices. The course also covers system design planning and partitioning...
