This course introduces the AMD Versal™ network on chip (NoC) to users familiar with other SoC architectures. Besides providing an overview of the major components in the Versal device, the course illustrates how the N...
Explore the AMD Versal™ adaptive SoC heterogeneous architecture containing a programmable network on chip (NoC) and AI Engines and learn how to use different design tool flows targeting Versal devices. Gain knowledge ...
This course provides an overview of the hard block capabilities for the AMD Zynq™ UltraScale+™ RFSoC family with a special emphasis on the RF Data Converter and Soft-Decision FEC blocks.The focus is on:Describing the ...
This course provides a thorough introduction to the Verilog language.The emphasis is on:Writing efficient hardware designsPerforming high-level HDL simulationsEmploying structural, register transfer level (RTL), and b...
This course describes the AMD Versal™ AI Engine architecture, the data communications within an AI Engine array and between the PL and AI Engines, how to program the AI Engines (single kernel programming and multiple ...
This course describes the system design flow and interfaces that can be used for data movement in the Versal™ AI Engine. It demonstrates how to utilize AI Engine APIs and the AI Engine DSP library for faster developme...
This course covers the advanced features of the AMD Versal™ adaptive SoC AI Engine, including kernel function development, optimizing an AI Engine kernel program, using AI Engine APIs and filter intrinsics, and debugg...
This course provides a thorough introduction to the VHDL language. The emphasis is on: Writing efficient hardware designs Performing high-level HDL simulations Employing structural, register transfer level (RTL), a...
Implement neural networks on cloud and edge platforms using the Vitis™ AI development platform. The emphasis of this course is on:Illustrating the Vitis AI tool flow, including optimization and compilation Exploring ...
Learn how to build and run complex multimedia applications targeting Zynq® UltraScale+™ MPSoC EV devices with the help of the GStreamer framework.This course illustrates how the use of the hardened video codec unit in...
