This course introduces the features and capabilities of the PCIe® and Cache Coherent Interconnect blocks in the Versal™ architecture. Learn how to implement a Versal™ device PCIe® solution in custom applications to im...
With recourse to already well-known VHDL language features, this workshop will deepen the knowledge in VHDL and enable the attendee to create simulations with the VHDL test bench concept The taught language constructi...
This workshop will teach the synthesis relevant aspects of the VHDL hardware description language based on the IEEE Std. 1076-2008 language revision.The theoretical knowledge will be deepened with selected examples an...
This course presents the Vitis AI development Toolkit for the AI inference on Xilinx Hardware platforms in conjunction with DNN algorithms, model training, associated frameworks for development and deploying it on Alv...
Sequential processing or data path speed is a bottleneck in many high-end systems based on CPUs whereas FPGAs provide massive parallel data processing along with optimized data path. A system with CPU and FPGA combina...
This course focuses on the embedded software related topics of the Xilinx Vitis Unified Software Platform. Vitis operation and project setup for various use cases with the Zynq 7000 SoC and Zynq Ultrascale+ MPSoC are ...
Since the invention of FPGAs, the development methodology was continuously evolving from schematic entry towards RTL based system modeling A downside of these methods is the requirement, that not only the desired func...
This is an introductory class. It teaches planning techniques and strategies as well as different software functions. The class guides the attendee through a complete design flow: Starting with the specification of th...
