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Virtual - Designing FPGAs Using the Vivado Design Suite 3
Learn how to build a more effective FPGA design.The focus is on:Using synchronous design techniquesUtilizing the Vivado™ IP integrator to create a sub-systemPerforming power analysis and optimization to improve the po...

Virtual - Designing with Ethernet MAC Controllers
Become acquainted with the various solutions that Xilinx offers for Ethernet connectivity.The course covers:Learning the basics of the Ethernet standard, protocol, and OSI modelPerforming simulation to understand fund...

Virtual - Designing with the IP Integrator Tool
Explore the Vivado™ IP integrator tool and its features to gain the expertise needed to develop, implement, and debug different IP integrator block designs using the Vivado Design Suite. This course focuses on: Creati...

Virtual - Designing with the UltraScale and UltraScale+ Architectures
This course introduces the AMD UltraScale™ and UltraScale+™ architectures to both new and experienced designers.The emphasis is on:Introducing CLB resources, clock management resources (MMCM and PLL), global and regio...

Virtual - Designing with the Ultrascale+ MPSoC (Doulos version)
This four-day LIVE Online Training (LOT) course is structured to provide FPGA HW, SW and system architects with an overview of the capabilities and support for the Zynq UltraScale+ MPSoC family.

Virtual - Designing with the Versal Adaptive SoC: Architecture
Learn about the AMD Versal™ adaptive SoC architecture building blocks, such as the programmable logic, high-speed I/O, clocking, processing system, AI Engines, and the programmable network on chip (NoC). Also learn ho...

Virtual - Designing with the Versal Adaptive SoC: Architecture and Design Methodology (Doulos version)
This course helps you to learn about Versal Adaptive SoC architecture and design methodology.The emphasis of this course is on:Reviewing the architecture of the Versal Adaptive SoCDescribing the different engines avai...

Virtual - Designing with the Versal Adaptive SoC: PCI Express Systems
Thiscourse introduces the features and capabilities of the PCIe® and Cache CoherentInterconnect blocks in the AMD Versal™ adaptive SoC architecture. Learn how toimplement a Versal device PCI Express® solution in custo...

Virtual - Designing with the Versal Adaptive SoC: Quick Start
Explore the AMD Versal™ adaptive SoC heterogeneous architecture containing a programmable network on chip (NoC) and AI Engines and learn how to use different design tool flows targeting Versal devices. Gain knowledge ...

Virtual - Designing with the Zynq UltraScale+ RFSoC
This course provides an overview of the hard block capabilities for the AMD Zynq™ UltraScale+™ RFSoC family with a special emphasis on the RF Data Converter and Soft-Decision FEC blocks.The focus is on:Describing the ...