Virtual - Designing FPGAs Using the Vivado Design Suite 3

Learn how to build a more effective FPGA design.

The focus is on:

Using synchronous design techniques
Utilizing the Vivado™ IP integrator to create a sub-system
Performing power analysis and optimization to improve the power efficiency of a design
Reviewing and analyzing timing reports for a design

This course builds on the concepts from the Designing FPGAs Using the Vivado Design Suite 1 course

3/31/2026 - 4/2/2026
Time Zone : (GMT-05:00) Eastern Time (US & Canada)
Seats Remaining : 20
Venue : Online - BLT
Address : www.bltinc.com

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