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Virtual - UVM Adopter Class (Doulos course)
The UVM Adopter Class will prepare you for full verification project readiness by focusing on the in-depth, practical application of the Universal Verification Methodology using commercial verification tools.

Virtual - Versal Adaptive SoC for the System Architect (PLC2 version)
With Versal, Xilinx offers the first highly integrated chip series in the new ACAP family -Adaptive Compute Acceleration Platform. The Versal Chips have a heterogeneous architecture with MPSoC, FPGA, PCIe Connectivity...

Virtual - VHDL for Designers (Doulos version)
VHDL for Designers (Xilinx) prepares the engineer for practical project readiness for FPGA designs. While the emphasis is on the practical VHDL-to-hardware flow for FPGA devices, this module also provides the essentia...

Virtual - Vitis Model Composer: A MATLAB and Simulink-based Product
This course provides experience with using the Vitis™ Model Composer tool for model-based designs.The course provides experience with: Creating a model-based design using HDL, HLS, and AI Engine library blocks along w...

Virtual - Vivado Advanced FPGA Design (Doulos version)
This course for experienced Xilinx FPGA designers allows you to maximize QoR in terms of clock rates, timing closure and power management. This class also enhance both individual and team productivity. The complete ra...

Virtual - Vivado FPGA Design Essentials (Doulos Version)
This course covers all essential Xilinx FPGA design concepts. It affords you a solid foundation for leveraging Xilinx tools and technology. We cover every aspect of FPGA design, from architectural considerations, to d...

Virtual – Zynq UltraScale+ MPSoC for the System Architect (PLC2 version)
This course provides system architects with an overview of the capabilities and support for the Zynq® UltraScale+™ MPSoC family. The emphasis is on leveraging the ARM Cortex-APU, RPU and platform management unit (PMU)...

Virtual: Advanced Formal Verification ONLINE (Doulos Version)
This is the follow-on course to Essential Formal Verification Online. It is intended to take engineers beyond an introductory use of formal technologies to a deep, practical level of knowledge of formal verification. ...

Vitis Model Composer: A MATLAB and Simulink-based Product
This course provides experience with using the Vitis™ Model Composer tool for model-based designs.The course provides experience with:Creating a model-based design using HDL, HLS, and AI Engine library blocks along wi...

Zynq UltraScale+ MPSoC for the Hardware Designer
This course provides hardware designers with an overview of the capabilities and support for the AMD Zynq™ UltraScale+™ MPSoC family from a hardware architectural perspective.The emphasis is on:Identifying the key ele...