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Platinum Academy - Team (5 Users)

Overview

Access all our On-Demand courses in one convenient bundle to learn everything about our products. Choose the content that’s right for you from 400+ hours of training.

  • Enhance your expertise in embedded development with AMD Versal™ adaptive SoCs or Zynq™ UltraScale+™ devices using the Vitis™ unified software platform
  • Productively use AMD Vivado™ design tools in RTL-based designs
  • Accelerate your design and AI in edge and cloud-based applications.

Bundles for additional users!

  • 1-4 users purchase (Individual)
  • 5 users purchase (Team: 5 users)
  • 6-9 users purchase (Team Incremental: 6-9 users, “Team 5” users is pre-req to this purchase)
  • 10 users purchase (Enterprise: 10 users)
  • 11+ users purchase(Enterprise Incremental 11+ users, “Team 10” users is a pre-req to this purchase)

For more information or to add additional users after purchase email registrar@amd.com.

Certifications

PLT - Accelerating Applications with the Vitis Unified Software Environment

PLT - Adaptive SoCs for System Architects

PLT - Design Closure Techniques

PLT - Designing FPGAs Using the Vivado Design Suite 1

PLT - Designing FPGAs Using the Vivado Design Suite 2

PLT - Designing FPGAs Using the Vivado Design Suite 3

PLT - Designing FPGAs Using the Vivado Design Suite 4

PLT - Designing with the IP Integrator Tool

PLT - Designing with the UltraScale and UltraScale+ Architectures

PLT - Designing with the Versal Adaptive SoC: Architecture

PLT - Designing with the Versal Adaptive SoC: Design Methodology

PLT - Designing with the Versal Adaptive SoC: Hardware Debug

PLT - Designing with the Versal Adaptive SoC: Memory Interfaces

PLT - Designing with the Versal Adaptive SoC: Network on Chip

PLT - Designing with the Versal Adaptive SoC: PCI Express Systems

PLT - Designing with the Versal Adaptive SoC: Power and Board Design

PLT - Designing with the Versal Adaptive SoC: Quick Start

PLT - Designing with the Versal Adaptive SoC: Serial Transceivers

PLT - Designing with the Zynq UltraScale+ RFSoC

PLT - Designing with Verilog

PLT - Designing with Versal AI Engine: Architecture and Design Flow - 1

PLT - Designing with Versal AI Engine: Graph Programming with AI Engine Kerne...

PLT - Designing with Versal AI Engine: Kernel Programming and Optimization 3

PLT - Designing with Versal AI Engine: Quick Start

PLT - Designing with VHDL

PLT - Developing AI Inference Solutions with the Vitis AI Platform

PLT - Developing Multimedia Solutions Using a Hardened VCU/VDU

PLT - DFX: Designing with Dynamic Function eXchange Using the Vivado Design S...

PLT - Embedded Design with PetaLinux Tools

PLT - Embedded Systems Design

PLT - Embedded Systems Software Design

PLT - High-Level Synthesis with the Vitis Unified IDE

PLT - Migrating to the Vitis Unified IDE

PLT - Operating Systems and Hypervisors in Adaptive SoCs

PLT - UltraFast Design Methodology

PLT - Using AMD Alveo Cards to Accelerate Dynamic Workloads

PLT - Using Robotics Applications with the Kria KR260 Robotics Starter Kit an...

PLT - Using Vision-based Applications with the Kria KV260 Vision AI Starter K...

PLT - Vitis Model Composer: A MATLAB and Simulink-based Product

PLT - Zynq UltraScale+ MPSoC for the Hardware Designer

PLT - Zynq UltraScale+ MPSoC: Boot and Platform Management

  • USD Price = 23000
Training Credit Price = 230 TC
Questions?