PLT - Designing with the Versal Adaptive SoC: Hardware Debug
Course Details
Length:
9
Number of Labs:
3
Number of Chapter:
8
Current Version:
2024.2
Number of Demos:
0
Overview
This course describes the tools and techniques available to debug AMD Versal™ devices. You will learn about features for debugging the fabric (programmable logic) and the hard blocks. The course also covers ChipScoPy APIs, which provide a Python™ interface to program and debug the Versal devices.
The emphasis of this course is on:
Describing the Versal device design flows
Enumerating the Versal device debug features for programmable logic (PL) and hard block debugging
Debugging the Versal device using different debug IP cores
Using ChipScoPy APIs for hardware debugging
Improving Versal device system performance
What's New:
Introduced the Advanced Flow for Versal implementation and the modular NoC flow in the Design Tool Flow module
Introduced the PDI debug utility in the Configuration and Debugging module
All labs have been updated to the latest software versions
