Designing with the Versal Adaptive SoC: PCI Express Systems
Course Details
Length:
20 Hours
Number of Labs:
8
Number of Chapter:
21
Current Version:
2025.1
Number of Demos:
0
Overview
This course introduces the features and capabilities of the PCIe® and Cache Coherent Interconnect blocks in the AMD Versal™ adaptive SoC architecture. Learn how to implement a Versal device PCI Express® solution in custom applications to improve time to market.
The emphasis of this course is on:
Describing the PCI Express design methodology for Versal devices
Reviewing various Versal device PCI Express core products
Selecting the PCI Express IP cores from the Vivado™ Design Suite
Generating PCI Express example designs and simple applications
Identifying the advanced capabilities of the PCIe specification
This course also focuses on the AXI-Streaming interconnect
What's New:
Updated to Versal Prime Series Gen 2 and Versal AI Edge Series Gen 2
New content on Gen 2 Series PS MDB PCI Express Solution
All labs have been updated to the latest software versions
