Learn how to improve design speed and reliability by using the UltraFast™ Design Methodology and the Vivado™ Design Suite. The focus is on:Optimizing system reset design and synchronization circuits Employing best pra...
The UVM Adopter Class will prepare you for full verification project readiness by focusing on the in-depth, practical application of the Universal Verification Methodology using commercial verification tools.
With Versal, Xilinx offers the first highly integrated chip series in the new ACAP family -Adaptive Compute Acceleration Platform. The Versal Chips have a heterogeneous architecture with MPSoC, FPGA, PCIe Connectivity...
VHDL for Designers (Xilinx) prepares the engineer for practical project readiness for FPGA designs. While the emphasis is on the practical VHDL-to-hardware flow for FPGA devices, this module also provides the essentia...
This course for experienced Xilinx FPGA designers allows you to maximize QoR in terms of clock rates, timing closure and power management. This class also enhance both individual and team productivity. The complete ra...
This course covers all essential Xilinx FPGA design concepts. It affords you a solid foundation for leveraging Xilinx tools and technology. We cover every aspect of FPGA design, from architectural considerations, to d...
This course provides system architects with an overview of the capabilities and support for the Zynq® UltraScale+™ MPSoC family.The emphasis is on:Utilizing power management strategies effectivelyLeveraging the platfo...
This course provides system architects with an overview of the capabilities and support for the Zynq® UltraScale+™ MPSoC family. The emphasis is on leveraging the ARM Cortex-APU, RPU and platform management unit (PMU)...
This is the follow-on course to Essential Formal Verification Online. It is intended to take engineers beyond an introductory use of formal technologies to a deep, practical level of knowledge of formal verification. ...
