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Virtual – Zynq UltraScale+ MPSoC for the System Architect (PLC2 version)

This course provides system architects with an overview of the capabilities and support for the Zynq® UltraScale+™ MPSoC family. The emphasis is on leveraging the ARM Cortex-APU, RPU and platform management unit (PMU) capabilities. A separation of protected software tasks is needed when several OS are running in a system securely and safely. A power-management concept in hard- and software will be demonstrated forgetting higher reliability and optimized power consumption.

12/15/2025 - 12/16/2025
Time Zone : (GMT+01:00) Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna
Seats Remaining : 6
Venue : Online - PLC2
Address :
3/9/2026 - 3/10/2026
Time Zone : (GMT+01:00) Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna
Seats Remaining : 12
Venue : Online - PLC2
Address :
6/18/2026 - 6/19/2026
Time Zone : (GMT+01:00) Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna
Seats Remaining : 12
Venue : Online - PLC2
Address :
12/14/2026 - 12/15/2026
Time Zone : (GMT+01:00) Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna
Seats Remaining : 12
Venue : Online - PLC2
Address :
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