Learn how to employ serial transceivers in UltraScale™ FPGA designs.The focus is on:Identifying and using the features of the serial transceiver blocks, such as 8B/10B and 64B/66B encoding, channel bonding, clock corr...
This course provides a thorough introduction to the Verilog language. The emphasis is on: Writing efficient hardware designs Performing high-level HDL simulations Employing structural, register transfer level (RTL), ...
This course describes the AMD Versal™ AI Engine architecture, the data communications within an AI Engine array and between the PL and AI Engines, how to program the AI Engines (single kernel programming and multiple ...
This course describes the system design flow and interfaces that can be used for data movement in the Versal™ AI Engine. It demonstrates how to utilize AI Engine APIs and the AI Engine DSP library for faster developme...
This course covers the advanced features of the Versal™ ACAP AI Engine, including debugging an application in the Vitis™ unified software platform, using filter intrinsics, implementing a system design in hardware, an...
This course is a combination of two courses (AIE1 & AIE2) related to the Versal™ AI Engine which are often taken back to back. This combination offers students the savings of time and money by removing the redundancie...
This course provides a thorough introduction to the VHDL language.The emphasis is on:Writing efficient hardware designsPerforming high-level HDL simulationsEmploying structural, register transfer level (RTL), and beha...
Learn how to employ serial transceivers in 7 series, UltraScale™, UltraScale+™ FPGA or Zynq® UltraScale+ MPSoC designs.The focus is on:Identifying and using the features of the serial transceiver blocks, such as 8B/10...
Implement neural networks on cloud and edge platforms using the Vitis™ AI development platform. The emphasis of this course is on: Illustrating the Vitis AI tool flow, including optimization and compilation Exploring...
Learn how tobuild and run complex multimedia applications targeting Zynq® UltraScale+™MPSoC EV devices with the help of the GStreamer framework. This course alsoillustrates how the use of the hardened video codec unit...
