This PLC2 workshop provides a comprehensive introduction to embedded Linux development for AMD Adaptive SoCs, combining the strengths of PetaLinux, Yocto, and the latest AMD Embedded Development Framework (EDF).Partic...
With the Versal Adaptive Compute Acceleration Platform (ACAP) family XILINX introduces versions of these FPGA with a special feature, the AI Engine. The AI Engine offers high performance, low latency capabilities for ...
Expert VHDL is an intensive 5-day advanced application class. It teaches engineers how to increase productivity by enhancing their VHDL coding and application skills. Presented in two distinct course modules, Expert V...
Expert VHDL Design is a 2 days class part of the intensive 5-day Expert VHDL class.Expert VHDL Design (2 days) is for design engineers wishing to deepen their knowledge of RTL synthesis using VHDL, and to improve thei...
Expert VHDL Verification is a 3 days course as part of the intensive 5-day Expert VHDL class.Expert VHDL Verification (3 days) is for design engineers and verification engineers involved in VHDL test bench development...
Agile and collaborative software development flows are gaining popularity as they result in more builds, tests, and integrations as well as faster delivery and deployment. Hence, the code is in a »release-at anytime« ...
This course provides a thorough introduction to high-level synthesis (HLS) using the AMD Vitis™ Unified IDE. The focus of this course is on: Converting C/C++ designs into RTL implementations.
This course provides software developers options and techniques for selecting and implementing various types of operating systems and hypervisors on AMD Zynq™ UltraScale+™ and Versal™ devices.
This five-days workshop includes teaching DSP and acceleration development methods for both generic FPGAs and Versal™ adaptive SoC technologies using the AMD Vitis™ Tools Model Composer, which needs to be used with MA...
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