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Virtual - Designing with the Versal Adaptive SoC: PCI Express Systems
Thiscourse introduces the features and capabilities of the PCIe® and Cache CoherentInterconnect blocks in the AMD Versal™ adaptive SoC architecture. Learn how toimplement a Versal device PCI Express® solution in custo...

Virtual - Designing with the Versal Adaptive SOC: Power and Board Design
This course provides a system-level understanding of power and thermal issues related to designing with the AMD Versal™ adaptive SoC. PCB design considerations for the Versal devices are also covered. The emphasis of ...

Virtual - Designing with the Versal Adaptive SoC: Quick Start
Explore the AMD Versal™ adaptive SoC heterogeneous architecture containing a programmable network on chip (NoC) and AI Engines and learn how to use different design tool flows targeting Versal devices. Gain knowledge ...

Virtual - Designing with the Zynq UltraScale+ RFSoC
This course provides an overview of the hard block capabilities for the AMD Zynq™ UltraScale+™ RFSoC family with a special emphasis on the RF Data Converter and Soft-Decision FEC blocks.The focus is on: Describing the...

Virtual - Designing with UltraScale FPGA Transceivers
Learn how to employ serial transceivers in UltraScale™ FPGA designs.The focus is on:Identifying and using the features of the serial transceiver blocks, such as 8B/10B and 64B/66B encoding, channel bonding, clock corr...

Virtual - Designing with Verilog
This course provides a thorough introduction to the Verilog language. The emphasis is on: Writing efficient hardware designs Performing high-level HDL simulations  Employing structural, register transfer level (RTL), ...

Virtual - Designing with Versal AI Engine 1 - Architecture and Design Flow
This course describes the AMD Versal™ AI Engine architecture, the data communications within an AI Engine array and between the PL and AI Engines, how to program the AI Engines (single kernel programming and multiple ...

Virtual - Designing with Versal AI Engine 2 - Graph Programming with AI Engine Kernels
This course describes the system design flow and interfaces that can be used for data movement in the Versal™ AI Engine. It demonstrates how to utilize AI Engine APIs and the AI Engine DSP library for faster developme...

Virtual - Designing with Versal AI Engine 3: Kernel Programming and Optimization
This course covers the advanced features of the Versal™ ACAP AI Engine, including debugging an application in the Vitis™ unified software platform, using filter intrinsics, implementing a system design in hardware, an...

Virtual - Designing with Versal AI Engines (Doulos Version)
This course is a combination of two courses (AIE1 & AIE2) related to the Versal™ AI Engine which are often taken back to back. This combination offers students the savings of time and money by removing the redundancie...