Virtual - Designing with Verilog

This course provides a thorough introduction to the Verilog language.

The emphasis is on:
  • Writing efficient hardware designs
  • Performing high-level HDL simulations  
  • Employing structural, register transfer level (RTL), and behavioral coding styles  
  • Targeting AMD devices specifically and FPGA devices in general  
  • Utilizing best coding practices This course covers Verilog 1995 and 2001. 

7/21/2025 - 7/23/2025
Time Zone : (GMT+08:00) Kuala Lumpur, Singapore
Seats Remaining : 8
Venue : Online - TechSource Systems
Address : Live Online
9/2/2025 - 9/4/2025
Time Zone : (GMT-05:00) Eastern Time (US & Canada)
Seats Remaining : 20
Venue : Online - BLT
Address : www.bltinc.com