Expert VHDL Verification is a 3 days course as part of the intensive 5-day Expert VHDL class.
Expert VHDL Verification (3 days) is for design engineers and verification engineers involved in VHDL test bench development or behavioural modelling for the purpose of functional verification.
The modules, which may be attended together or independently, follow on from the industry standard class, Comprehensive VHDL. Carefully designed workshops comprise approximately 50% of teaching time, and enable engineers to apply their new skills in the context of the latest VHDL design tools, practices and methodologies.
9/17/2025 - 9/19/2025 Time Zone : (GMT+01:00) Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna Seats Remaining : 6 Venue : NLD - Heesch - CoreVision Headquarters Address : Cereslaan 24,Heesch,NETHERLANDS
