IC Verification with Python and cocotb teaches how to use coroutine-based co-simulation testbench (cocotb), a Python-based simulation environment, to carry out RTL verification. Python is pervasive: often taught as a first programming language in most STEM degree courses. This course is an attractive option for verification engineers to accelerate their project readiness by using Python rather than learning a new hardware verification language, such as SystemVerilog. Python’s use in semiconductor design and verification extends from scripting for data pre-processing/post-processing, flow control, through to verification test case development and “on the fly” checking. Python also has a very rich ecosystem of utility libraries that can be leveraged to accelerate development of verification test benches and domain specific verification IP for ASIC/SOC/FPGA projects. Covering such areas as: digital signal processing for audio & vision pipelines as well as most aspects of Machine Learning. Often, projects are using the same generators & checkers in the hardware algorithm system modelling as in the RTL design-under-verification. Python serves as a common baseline for teams composed of different engineering disciplines. Furthermore, Python is a cost-effective way to extend a team’s scope without the need for significant investment to re-skill on a new set of programming languages.
5/18/2026 - 5/22/2026 Time Zone : (GMT-08:00) Pacific Time (US & Canada) Seats Remaining : 12 Venue : Online - Doulos Ltd Address :
6/1/2026 - 6/5/2026 Time Zone : (GMT-08:00) Pacific Time (US & Canada) Seats Remaining : 12 Venue : Online - Doulos Inc Address :
7/6/2026 - 7/10/2026 Time Zone : (GMT-08:00) Pacific Time (US & Canada) Seats Remaining : 12 Venue : Online - Doulos Ltd Address :
7/20/2026 - 7/24/2026 Time Zone : (GMT-08:00) Pacific Time (US & Canada) Seats Remaining : 12 Venue : Online - Doulos Inc Address :
