Gain a comprehensive understanding of the AMD Versal adaptive SoC architecture building blocks, such as programmable logic (PL), high-speed I/O, clocking, processing system (CIPS), Intelligent Engines (AIE), and the programmable network on chip (NoC). Also learn how to use leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. Throughout the training, you will apply different AMD adaptive SoC design methodologies and techniques for developing designs targeting Versal devices. Also learn how to apply application mapping and partitioning, design closure, power, and thermal solutions to enhance the performance of a design. The course will be taught in Spanish by default.
11/11/2025 - 11/14/2025 Time Zone : (GMT+01:00) Brussels, Copenhagen, Madrid, Paris Seats Remaining : 16 Venue : ESP, Madrid - Universidad Autonoma de Madrid Address : Fco Tomas y Valiente 11,School of Engineering,Madrid,SPAIN
