Classroom - Design Compendium with High Level Synthesis for AMD devices (So-Logic)

"Basic HLS Tutorial" is a document made for beginners who are entering the world of embedded system design using FPGAs.This tutorial explains, step by step, the procedure of designing a simple digital system using C/C++/SystemC languages and AMD Xilinx Vivado Design Suite.In the "Basic HLS Tutorial", a PWM signal modulated using the sine wave with two different frequencies (1 Hz and 3.5Hz) will be created. Frequency that will be chosen depends on the position of the two-state on-board switch.

8/3/2026 - 12/18/2026
Time Zone : (GMT-08:00) Pacific Time (US & Canada)
Seats Remaining : 10
Venue : AUT Vienna - So-Logic Office
Address : Rosengasse 29,Gerasdorf / Kapellerfeld,AUSTRIA
3/1/2027 - 9/10/2027
Time Zone : (GMT-08:00) Pacific Time (US & Canada)
Seats Remaining : 10
Venue : AUT Vienna - So-Logic Office
Address : Rosengasse 29,Gerasdorf / Kapellerfeld,AUSTRIA