Classroom - Design Compendium Verification with VHDL for AMD devices (So-Logic)

"Basic Functional Verification Tutorial" is a document made for beginners who are entering the world of verification. This tutorial explains, step by step, the procedure of different strategies of testing, discussing how the verification environment is structured and how the verification components interact with one another, as well as how the verification team has affects the testing strategy.

7/2/2026 - 11/19/2026
Time Zone : (GMT+01:00) Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna
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Venue : AUT Vienna - So-Logic On-Line
Address : Rosengasse 29,Gerasdorf / Kapellerfeld,AUSTRIA