Explore the AMD Versal™ adaptive SoC heterogeneous architecture containing a programmable network on chip (NoC) and AI Engines and learn how to use different design tool flows targeting Versal devices. Gain knowledge of embedded software development and application partitioning. Also learn how to perform system migration to the Versal architecture.
The emphasis of this course is on:
Reviewing the architecture of the Versal adaptive SoC
Describing the different compute resources available in the Versal architecture
Demonstrating the embedded software development flow for Versal devices
Describing the architectures of the network on chip (NoC) and AI Engine
Explaining application partitioning based on the models of computation
Comparing various functional blocks of the Versal devices to previous-generation devices
9/4/2025 - 9/4/2025 Time Zone : (GMT+09:00) Osaka, Sapporo, Tokyo Seats Remaining : 8 Venue : Online HDLAB Address : 3-18-14 Shin-Yokohama, Kohoku-ku,Sumisei Shin-Yokohama Daini Bldg. 4F.,Yokohama,JAPAN
