This course describes the tools and techniques available to debug AMD Versal™ devices. You will learn about features for debugging the fabric (programmable logic) and the hard blocks. The course also covers Chip ScoPy APIs, which provide a Python™ interface to program and debug the Versal devices.
The emphasis of this course is on:
Describing the Versal device design flows
Enumerating the Versal device debug features for programmable logic (PL) and hard block debugging
Debugging the Versal device using different debug IP cores
Using ChipScoPy APIs for hardware debugging
Improving Versal device system performance
9/17/2025 - 9/18/2026 Time Zone : (GMT-08:00) Pacific Time (US & Canada) Seats Remaining : 10 Venue : AUT Vienna - So-Logic Office Address : Rosengasse 29,Gerasdorf / Kapellerfeld,AUSTRIA
