| The Versal™ architecture allows very fast interfaces to external components based on significantly improved silicon structures as well as new IP Core configuration wizards. Realization challenges are shifting from chip level to board level with the new Versal™ platform. Extreme accuracy in PCB design is mandatory to achieve high-speed data rates. This workshop discusses in-depth designing for DDR4, PCIe® interfaces, and high-performance Ethernet MACs. All design steps are described: IP configuration, functional simulation, and implementation. Designs will be demonstrated and verified on real Versal™ hardware. Additional focus is put on the physical layer – PCB design. Practical design and verification examples are discussed. Students learn how to apply design rules to the PCB design. Methodical tips and tricks are provided throughout the training. |
