This course introduces the features andcapabilities of the PCIe® and Cache Coherent Interconnect blocks in the Versal™architecture. Learn how to implement a Versal ACAP PCI Express® solution incustom applications to improve time to market.
The emphasis of this course is on:
▪ Describing the Xilinx PCI Express designmethodology
▪ Enumerating various Xilinx PCI Express coreproducts
▪ Selecting the PCI Express IP cores from theVivado® Design Suite
▪ Generating PCI Express example designs andsimple applications
▪ Identifyingthe advanced capabilities of the PCIe specification
This course also focuses on the AXI-Streaminginterconnect
7/9/2026 - 7/10/2026 Time Zone : (GMT-06:00) Central Time (US & Canada) Seats Remaining : 6 Venue : USA, MN, Orono - Morgan A.P.S., Inc. Address : 2500 Shadywood Rd.,Suite 535,Orono,MN,USA
7/27/2026 - 7/28/2026 Time Zone : (GMT-06:00) Central Time (US & Canada) Seats Remaining : 6 Venue : USA, MN, Orono - Morgan A.P.S., Inc. Address : 2500 Shadywood Rd.,Suite 535,Orono,MN,USA
