This course provides a thorough introduction to the Vitis™ High-LevelSynthesis(HLS) tool.
The focus is on:
Covering synthesis strategies and features
Applying different optimization techniques
Improving throughput, area, interface creation, latency, test bench coding, and coding tips
Utilizing the Vitis HLS tool to optimize code for high-speed performance in an embedded environment
Downloading for in-circuit validation
3/18/2026 - 3/19/2026 Time Zone : (GMT-06:00) Central Time (US & Canada) Seats Remaining : 6 Venue : USA, MN, Orono - Morgan A.P.S., Inc. Address : 2500 Shadywood Rd.,Suite 535,Orono,MN,USA
3/30/2026 - 3/31/2026 Time Zone : (GMT-06:00) Central Time (US & Canada) Seats Remaining : 6 Venue : USA, MN, Orono - Morgan A.P.S., Inc. Address : 2500 Shadywood Rd.,Suite 535,Orono,MN,USA
8/4/2026 - 8/5/2026 Time Zone : (GMT+01:00) Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna Seats Remaining : 6 Venue : NLD - Heesch - CoreVision Headquarters Address : Cereslaan 24,Heesch,NETHERLANDS
