This course helps you to learn about Versal™ ACAP architecture and design methodology.
The emphasis of this course is on:
Reviewing the architecture of the Versal ACAP
Describing the different engines available in the Versal architecture and what resources they contain
Utilizing the hardened blocks available in the Versal architecture
Using the design tools and methodology provided by Xilinx to create complex systems
Describing the network on chip (NoC) and AI Engine concepts and their architectures
Performing system-level simulation and debugging
11/3/2026 - 11/6/2026 Time Zone : (GMT+01:00) Brussels, Copenhagen, Madrid, Paris Seats Remaining : 16 Venue : ESP, Madrid - Universidad Autonoma de Madrid Address : Fco Tomas y Valiente 11,School of Engineering,Madrid,SPAIN
4/12/2027 - 4/15/2027 Time Zone : (GMT+01:00) Brussels, Copenhagen, Madrid, Paris Seats Remaining : 16 Venue : ESP, Madrid - Universidad Autonoma de Madrid Address : Fco Tomas y Valiente 11,School of Engineering,Madrid,SPAIN
