This coursepresents the Vitis AI development Toolkit for the AI inference on XilinxHardware platforms in conjunction with DNN algorithms, model training,associated frameworks for development and deploying it on Alveo™ cards, ZynqSoCs, Zynq® UltraScale+™ MPSoCs. The basics of Machine Learning (ML) approach and challenges in Neural Networktraining are revisited as common introduction. Having this the support formainstream frameworks like Caffe and Tensorflow in the Vitis Toolchain isexplained. The models for diverse deep learning tasks are discussed along withthese frameworks and for further insight, a comprehensive pre-optimized modellibrary is available offering models that can readily be deployed on Xilinxdevices. The concepts of Vitis AI development kit are shown with the Frameworkspecific tools to prune and optimize the trained models to have a properly scaledbase for mapping. From this output the AI Compiler generates deployable code that can then be runon a specific FPGA fabric microarchitecture, the DPU, which is introduced withits parametric features as FPGA IP. It will become clear how Vitis AI developmentkit tools can be used for analyzing the model performance and debugging. Tocomplete the full deployment, the final chapters present Vitis AI libraries andAPIs and show how to integrate it with DPU for optimized inference.
9/1/2025 - 9/3/2025 Time Zone : (GMT+01:00) Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna Seats Remaining : 6 Venue : Online - PLC2 Address :
11/10/2025 - 11/12/2025 Time Zone : (GMT+01:00) Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna Seats Remaining : 6 Venue : Online - PLC2 Address :
