This course provides a structured, end-to-end approach for migrating GPU-accelerated applications from NVIDIA CUDA to the AMD ROCm™ platform using the Heterogeneous-computing Interface for Portability (HIP) programming model. Participants gain a comprehensive understanding of the AMD RDNA™ GPU architecture, the ROCm software stack, HIP programming, and the tools required to port, debug, profile, and optimize real-world GPU workloads.
The course emphasizes architectural mapping between CUDA and HIP, practical migration workflows, performance optimization, and correctness validation to ensure a smooth and efficient transition to supported AMD GPU platforms.
The emphasis of this course is on:
Understanding the AMD RDNA GPU architecture and single instruction, multiple threads (SIMT) execution model
Exploring the ROCm platform and its open GPU computing ecosystem
Optimizing memory access, synchronization, and kernel execution on RDNA GPUs
Applying the HIP programming model for portable GPU development
Mapping CUDA concepts, APIs, and toolchains to their HIP/ROCm equivalents
Executing a structured CUDA-to-HIP migration workflow utilizing validation and optimization strategies
Debugging GPU kernels using ROCgdb at wavefront and lane granularity
Profiling GPU and system performance using ROCm profiling tools
