SLVR - Designing with the Versal Adaptive SoC: Quick Start
Course Details
Length:
10 Hours
Number of Labs:
4
Number of Chapter:
9
Current Version:
2024.2
Number of Demos:
0
Overview
Explore the AMD Versal™ adaptive SoC heterogeneous architecture containing a programmable network on chip (NoC) and AI Engines and learn how to use different design tool flows targeting Versal devices. Gain knowledge of embedded software development and application partitioning. Also learn how to perform system migration to the Versal architecture.
The emphasis of this course is on:
Reviewing the architecture of the Versal adaptive SoC
Describing the different compute resources available in the Versal architecture
Demonstrating the embedded software development flow for Versal devices
Describing the architectures of the network on chip (NoC) and AI Engine
Explaining application partitioning based on the models of computation
Comparing various functional blocks of the Versal devices to previous-generation devices
What,s New:
Added Versal RF series details in the Introduction module
Introduced the Advanced Flow for Versal implementation and the modular NoC flow in the Design Tool Flow module
Added a lab on bare-metal application development and debugging
Added the modular NoC flow for RTL users in the NoC Introduction and Concepts module
Added a design migration checklist in the System Migration module
All labs have been updated to the latest software versions
