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Free Workshop Virtual - Achieving Timing Closure in FPGA Designs (BLT Version)
Do you find it challenging to close timing in your FPGA design?This workshop will guide you through leveraging AMD Vivado’s tools, optimizing your design, and applying best practices for static timing analysis to achi...

Free Workshop Virtual - Getting Started with AMD Embedded x86 Processors Workshop (BLT Version)
This online workshop introduces key concepts, tools, and techniques required for design and development using AMD embedded x86 processors, including Zen 5, Epyc, and Ryzen.This course provides a structured approach to...

Free Workshop: Virtual - Vitis IDE Quick Start Workshop (BLT Version)
This online workshop introduces key concepts, tools, and techniques required for software design and development using the AMD Vitis™ Integrated Design Environment (Vitis IDE).This course focuses on the Versal adaptiv...

Virtual - Accelerating Applications with the Vitis Unified Software Environment
Learn how to develop, debug, and profile new or existing C/C++ and RTL applications in the Vitis™ unified software environment targeting both data center and embedded applications.The emphasis of this course is on:Usi...

Virtual - Advanced Versal AI Engine (PLC2 version)
With the VersalAdaptive Compute Acceleration Platform (ACAP) family XILINX introduces versionsof these devices with a special feature, the AI Engine. The AI Engine offershigh performance, low latency capabilities for ...

Virtual - Advanced VHDL
Increase VHDL proficiency by learning advanced techniques for writing more robust and reusable code.The focus is on:Writing efficient and reusable RTL, testbenches, and packagesCreating self-testing testbenchesCreatin...

Virtual - Advanced Vivado (PLC2 version)
The AMD Vivado™ design suite tool provides many features which offer valuable features for the experienced hardware designer. Extended tool features are needed for a higher productivity in the development process: the...

Virtual - Advanced Zynq UltraScale+ MPSoC for the Software Designer (PLC2 version)
This course explains the features of the CPUs in the processing system to effectively design embedded software for operating systems and complex applications. In systems deploying multiple independent processors in op...

Virtual - Arm Cortex-A53/R5 for Zynq UltraScale+MPSoC (Doulos version)
This course covers the software aspects ofdesigning with an Arm® Cortex®-A53 MPCore based device, highlighting the core architecture details and the Xilinx® Zynq® UltraScale+™ implementation choices.Topics include the...