Explore the Vivado™ IP integrator tool and its features to gain the expertise needed to develop, implement, and debug different IP integrator block designs using the Vivado Design Suite. This course focuses on: Creati...
Are you interested in learning how to effectively utilize Spartan-6 FPGA architectural resources? This course supports both experienced and less experienced FPGA designers who have already completed the Essentials of ...
This is a one-day version of the Designing with the UltraScale Architecture course and introduces new and experienced designers to the most sophisticated aspects of the UltraScale and UltraScale+ architectures. Target...
This course introduces the AMD UltraScale™ and UltraScale+™ architectures to both new and experienced designers.The emphasis is on:Introducing CLB resources, clock management resources (MMCM and PLL), global and regio...
This four-day LIVE Online Training (LOT) course is structured to provide FPGA HW, SW and system architects with an overview of the capabilities and support for the Zynq UltraScale+ MPSoC family.
Learn about the AMD Versal™ adaptive SoC architecture building blocks, such as the programmable logic, high-speed I/O, clocking, processing system, AI Engines, and the programmable network on chip (NoC). Also learn ho...
This course helps you to learn about Versal Adaptive SoC architecture and design methodology.The emphasis of this course is on:Reviewing the architecture of the Versal Adaptive SoCDescribing the different engines avai...
Use different AMD Versal™ adaptive SoC design methodologies and techniques for developing designs targeting Versal devices. Also learn how to apply application mapping and partitioning, design closure, power, and ther...
This course introduces the AMD Versal™ network on chip (NoC) to users familiar with other SoC architectures. Besides providing an overview of the major components in the Versal device, the course illustrates how the N...
Thiscourse introduces the features and capabilities of the PCIe® and Cache CoherentInterconnect blocks in the AMD Versal™ adaptive SoC architecture. Learn how toimplement a Versal device PCI Express® solution in custo...
