Provides experiences system architects with the knowledge on how to best architect a Zynq® System on a Chip (SoC) device project.
This course covers:
Identifying the features and benefits of the Zynq SoC architecture
Describing the architecture of the ARM® Cortex™-A9 processor-based processing system (PS) and the connections to the programmable logic (PL)
Detailing the individual components that comprise the PS: I/O peripherals, timers, caching, DMA, interrupts, and memory controllers
Effectively accessing and using the PS DDR controller from PL user logic
Interfacing PL-to-PS connections efficiently
Employing best practice design techniques for implementing functions in the PS or PL
7/6/2026 - 7/7/2026 Time Zone : (GMT-06:00) Central Time (US & Canada) Seats Remaining : 6 Venue : USA, KS, Overland Park - Morgan A.P.S., Inc. Address : Overland Park, KS,Morgan Advanced Programmable Systems, Inc.,Overland Park,KS,USA
8/13/2026 - 8/14/2026 Time Zone : (GMT-06:00) Central Time (US & Canada) Seats Remaining : 6 Venue : USA, IL, Chicago - Morgan A.P.S., Inc. Address : Chicago,Chicago,IL,USA
8/27/2026 - 8/28/2026 Time Zone : (GMT-08:00) Pacific Time (US & Canada) Seats Remaining : 9 Venue : KOR, Seoul - Wedu Office Address : #B820, Tera tower 2, 201 Songpa-daero, Songpa-gu,Seoul,SOUTH KOREA
